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Let’s think of a process in execution as having: a table of descriptors, a code memory segment, a heap memory segment and a stack memory segment, machinery continuations general. The Instruction Pointer CPU register (IP) keeps track of the next instruction to execute in the code segment; the Stack Pointer CPU register (SP) keeps track of the current location on the stack; dynamically allocated data goes in the heap segment.
|---|---|---| descriptors table
| | |
| | | IP
| | v v
| | |------+---------------| code segment
| v
| |----------------------| heap segment
v
|----------+-----------| stack segment
^
SP
Figure 16.13: Memory segments of a process in execution.
One way to implement continuations is to push the current IP
on the stack segment, duplicate the stack segment itself, finally save
somewhere the SP; later we can reinstall the saved stack
segment, reset the SP and perform a ret assembly
instruction that will pop the saved IP and resume the
execution; machinery
continuations general. Of course we must make sure that the resources
referenced by the saved stack segment are not released while the
continuation still exists.
|---|---|---| descriptors table
| | |
| | | IP IP1
| | v v v
| | |------+-+--------------| code segment
| v
| |----------------------| heap segment
|
v IP1
|----------+--+---------| stack segment
^
SP
IP1
|----------+--+---------| duplicated stack segment
^
SP
Figure 16.14: Duplicated stack segment as continuation implementation mechanism.
Stack segment duplication is not the way Vicare implements continuations; but the actual implementation is not conceptually different.